一种超高速太赫兹测试信号产生器的设计

1)中国电子科技集团公司第五十四研究所,河北石家庄 050081; 2)天津大学电气自动化与信息工程学院,天津 300072

太赫兹; 电流模式逻辑门; 伪随机二进制序列产生器; 正交相移编码; 互补金属氧化物半导体; 触发器; 高速电流型逻辑电路

A signal generator for ultra-high speed terahertz testing
SONG Ruiliang1 and LIU Yibo2

1)The 54th Research Institute of China Electronics Technology Group Corporation, Shijiazhuang 050081, Hebei Province, P.R.China2)School of Electrical and Information Engineering, Tianjin University, Tianjin 300072, P.R.China

terahertz; current mode logic(CML); pseudo-random bit sequence generator; quadrature phase shift keying(QPSK); complementary metal oxide semiconductor(CMOS); flip-flops; high-speed current mode logic

DOI: 10.3724/SP.J.1249.2019.02176

备注

太赫兹通信系统具有极高的数据率特性,对测试环境提出巨大挑战.本研究实现一种伪随机二进制序列(pseudo-random bit sequence, PRBS)发生器,能够支持正交相移编码(quadrature phase shift keying, QPSK)调制模式,实现在QPSK调制模式下高达40 Gbit/s码率的数据率输出,为太赫兹频带的通信系统应用测试环境提供必要条件.该PRBS发生器采用交叉存取的拓扑结构和高速数据选择器,延迟单元采用电流模式逻辑电路结构以保证高频工作情况下具有良好性能.电路采用标准40 nm 互补金属氧化物半导体(complementary metal-oxide-semiconductor, CMOS)工艺,版图面积为0.25×0.15 mm2.PRBS产生器在电源电压为1.0 V下功耗为37.5 mW. 该技术可解决太赫兹高速数据测试的瓶颈问题.

The very high data rate of terahertz communication systems poses great challenges to the testing environment. This paper presents a pseudo-random bit sequence(PRBS)generator with the data rate up to 40 Gbit/s in the quadrature phase shift keying(QPSK)mode. The proposed PRBS generator, achieves bit rate up to 40 Gbit/s in the QPSK modulation mode which can adequately support the communication applications in terahertz frequency band. The PRBS generator utilizes the interleaved topology with high-speed multiplexers. The current mode logic(CML)gates are employed as the latch unit for high data rate operation. The circuit is implemented in standard 40 nm bulk complementary metal-oxide-semiconductor(CMOS)process and the layout area is 0.25×0.15 mm2. The power consumption of the PRBS generator is 37.5 mW at a supply voltage of 1.0 V. This technology can solve the bottleneck problem of terahertz high rate data testing.

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