基于龙芯3B处理器的Linpack优化实现
刘 刚,张 恒,张 滇,毛 睿

深圳大学计算机与软件学院,广东省普及型高性能计算机实验室,深圳 518060

计算机系统结构; 龙芯3B处理器; 线性系统软件包; 矩阵乘法; 数据预取

Optimization of Linpack for Loongson 3B processor
Liu Gang,Zhang Heng,Zhang Dian,and Mao Rui

Liu Gang,Zhang Heng,Zhang Dian,and Mao RuiCollege of Computer Science and Software Engineering, Guangdong Province Key Laboratory of Popular High Performance Computers, Shenzhen University, Shenzhen 518060, P.R.China

computer architecture; Loongson 3B processor; linear system package; matrix multiplication; data prefetching

DOI: 10.3724/SP.J.1249.2014.03286

备注

HPL是高性能计算广泛采用的Linpack 测试软件包.针对龙芯3B处理器体系结构的特点,为Linpack中的核心部分——矩阵乘法设计矩阵分块策略,利用龙芯3B的cache锁机制将频繁调用的数据分块锁在cache中,从而显著降低cache缺失率.同时为龙芯3B处理器中的访存加速部件设计了高效的预取算法,以实现计算时间掩盖访存时间.另外,分别对Linpack所调用的dtrsm和行交换等热点函数进行优化,并通过参数训练来优化Linpack参数.实验结果表明,在龙芯3B处理器上,单节点4核以及双节点8核的Linpack实测性能均达到理论峰值的60%左右,优化后的Linpack性能较优化前提升了10倍左右.

High performance Linpack(HPL)is a linpack benchmark package widely adopted in high performance computing. An efficient partition strategy is introduced by Loongson 3B processor's architectural features in the matrix multiplication, and the cache lock mechanism which locks the frequently used data blocks into the locked cache is introduced to reduce the missing cache. To make the computation cost hides the memory access cost, a new prefetching algorithm is included in the memory access acceleration device. Other functions, such as dtrsm and line swapping, are optimized, and the optimal value is achieved for each parameter by training. Experimental results indicate that both single-node(4 cores)and double-node(8 cores)have achieved about 60% of theoretical peak performance, which are nearly 10 times performance improvement compared with non-optimized Linpack.

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