[1]廉德亮,张 炜,朱明程.静态SAT问题并行处理器的设计研究[J].深圳大学学报理工版,2002,19(3):24-30.
 LIAN De-liang,ZHANG Wei,ZHU Ming-cheng.The Research on the Design of Static SAT Parallel Processors[J].Journal of Shenzhen University Science and Engineering,2002,19(3):24-30.
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静态SAT问题并行处理器的设计研究()
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《深圳大学学报理工版》[ISSN:1000-2618/CN:44-1401/N]

卷:
第19卷
期数:
2002年3期
页码:
24-30
栏目:
光电与信息工程
出版日期:
2002-09-30

文章信息/Info

Title:
The Research on the Design of Static SAT Parallel Processors
文章编号:
1000-2618(2002)03-0024-07
作者:
廉德亮张 炜朱明程
深圳大学信息工程学院,深圳518060
Author(s):
LIAN De-liangZHANG WeiZHU Ming-cheng
College of Information Engineering Shenzhen University Shenzhen 518060 P.R.China
关键词:
SAT问题FPGA回溯搜索算法并行处理器
Keywords:
SAT problemFPGAbacktrack search algorithmparallel processor
分类号:
TN 402
文献标志码:
A
摘要:
针对SAT问题的复杂性及求解速度缓慢的问题,采用可重构器件FPGA设计,实现了静态回溯搜索算法SAT问题并行处理器,提出了研制动态SAT并行处理器的设想.
Abstract:
Due to the complexity of the SAT problem,the speed of solving the SAT problem with software method is very slow.Using the reconfigurable characteristic and the ability of processing data parallelly of the FPGA,the static backtrack search algorithm SAT parallel processor designed with FPGA can solve SAT problem much faster now.And the successful design provides a foundation for the further building of dynamic SAT Parallel Processor.
更新日期/Last Update: 2015-11-13